Show simple item record

dc.contributor.authorButler, J.T.
dc.contributor.authorSasao, T.
dc.date.accessioned2015-06-30T17:41:31Z
dc.date.available2015-06-30T17:41:31Z
dc.date.issued2011-05
dc.identifier.urihttp://hdl.handle.net/10945/45462
dc.description.abstractWe show a high-speed hardware implementation of xmod z that can be pipelined in O(n ° m) stages, where x is represented in n bits and z is represented in m bits. It is suitable for large x. We offer two versions. In the first, the value of z is fixed by the hardware. For example, using this circuit, we show a random number generator that produces more than 11 million random numbers per second on the SRC-6 reconfigurable computer. In the second, z is an independent input. This is suitable for RNS number system applications, for example. The second version can be pipelined in O(n) stages.en_US
dc.publisherMonterey, California: Naval Postgraduate School.en_US
dc.rightsThis publication is a work of the U.S. Government as defined in Title 17, United States Code, Section 101. Copyright protection is not available for this work in the United States.en_US
dc.titleFast Hardware Computation of x mod zen_US
dc.typeArticleen_US
dc.contributor.departmentElectrical and Computer Engineeringen_US
dc.subject.authorx mod z computationen_US
dc.subject.authorhigh-speed modulo reductionen_US
dc.subject.authormod z arithmeticen_US
dc.description.distributionstatementApproved for public release; distribution is unlimited.


Files in this item

Thumbnail

This item appears in the following Collection(s)

Show simple item record