High Resolution Encoding Circuit and Process for Analog to Digital Conversion
Abstract
An analog-to-digital converter in which an analog input
signal is folded by a plurality of folding circuits whose
moduli, and hence half folding periods, are mutually prime
with respect to one another. Each folding circuit has an
associated comparator ladder having one less comparator
than the modulus of the folding circuit. The collective output
of the ladders, i,e, the states of the comparators in the
ladders, uniquely corresponds to input signal magnitude
over a dynamic range equal to the product of the folding
circuits' moduli, permitting a greater dynamic range for the
converter for the number of comparators used.
Description
Patent
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This publication is a work of the U.S. Government as defined in Title 17, United States Code, Section 101. Copyright protection is not available for this work in the United States.Collections
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