Signal Synthesizer and Method Therefor
dc.contributor.author | Pace, Phillip E. | |
dc.contributor.author | Surratt, Robert E. | |
dc.contributor.author | Yeo, Siew-Yam | |
dc.date.accessioned | 2012-07-11T15:55:08Z | |
dc.date.available | 2012-07-11T15:55:08Z | |
dc.date.issued | 2006-12-26 | |
dc.identifier.other | 7154431 | |
dc.identifier.uri | http://hdl.handle.net/10945/7251 | |
dc.description | Patent | en_US |
dc.description.abstract | A digital synthesizer includes a digital radio frequency memory (DRFM) for storing phase values and corresponding digital signals. The digital synthesizer includes a digital processing circuit receiving input from the DRFM, the circuit including tapped delay lines and a summer summing the output of the tapped delay lines. The digital synthesizer includes a signal modulator independently synthesizing within each tapped delay line a frequency modulated and gain scaled signal, wherein input to the tapped delay lines are phase values from the DRFM. | en_US |
dc.publisher | The United States of America as represented by the Secretary of the Navy, Washington, DC (US) | en_US |
dc.rights | This publication is a work of the U.S. Government as defined in Title 17, United States Code, Section 101. Copyright protection is not available for this work in the United States. | en_US |
dc.title | Signal Synthesizer and Method Therefor | en_US |
dc.type | Patent | en_US |
dc.contributor.corporate | Monterey, California, Naval Postgraduate School | |
dc.contributor.corporate | Monterey, California : Naval Postgraduate School |