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dc.contributor.authorPace, Phillip E.
dc.contributor.authorSurratt, Robert E.
dc.contributor.authorYeo, Siew-Yam
dc.date.accessioned2012-07-11T15:55:08Z
dc.date.available2012-07-11T15:55:08Z
dc.date.issued2006-12-26
dc.identifier.other7154431
dc.identifier.urihttp://hdl.handle.net/10945/7251
dc.descriptionPatenten_US
dc.description.abstractA digital synthesizer includes a digital radio frequency memory (DRFM) for storing phase values and corresponding digital signals. The digital synthesizer includes a digital processing circuit receiving input from the DRFM, the circuit including tapped delay lines and a summer summing the output of the tapped delay lines. The digital synthesizer includes a signal modulator independently synthesizing within each tapped delay line a frequency modulated and gain scaled signal, wherein input to the tapped delay lines are phase values from the DRFM.en_US
dc.publisherThe United States of America as represented by the Secretary of the Navy, Washington, DC (US)en_US
dc.rightsThis publication is a work of the U.S. Government as defined in Title 17, United States Code, Section 101. Copyright protection is not available for this work in the United States.en_US
dc.titleSignal Synthesizer and Method Thereforen_US
dc.typePatenten_US
dc.contributor.corporateMonterey, California, Naval Postgraduate School
dc.contributor.corporateMonterey, California : Naval Postgraduate School


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