Basic hardware interconnection mechanisms for building multiple microcomputer systems

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Authors
Carey, Bernard J.
McCoy, Earl E.
Subjects
Multiplecomputers , Hardware Interconnection Mechanisms, Microcomputers, Computer Architecture Taxonomy, Digital Hardware Primitives
Advisors
Date of Issue
1979-11
Date
1979-11
Publisher
Monterey, California. Naval Postgraduate School
Language
en_US
Abstract
This report presents the current results of a research project which has been concerned with methods for designing and implementing multiple microcomputer systems. The design method is based upon identifying hardware interconnection primitives which may be used to construct the interconnection subsystem which characterizes a given multicomputer architecture. An actual experimental system has been constructed which will permit building nine of ten systems in the Anderson and Jensen architecture taxonomy. (Author)
Type
Technical Report
Description
Series/Report No
Department
Computer Science
Identifiers
NPS Report Number
NPS-52-79-005
Sponsors
Supported in part by the Department of Electrical Engineering and Computer Science, University of Connecticut, Storrs, Connecticut and in part by the Department of Computer Science, Naval Postgraduate School, Monterey, California
Funder
Format
31 p. : ill. ; 28 cm.
Citation
Distribution Statement
Approved for public release; distribution is unlimited.
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